Hello @Fabian Schmieder, it’s really good to see more people working on hosted AROS for Apple Silicon. I’ve been working on the same target for some time as part of Macaros, with the AROS-specific changes kept in AROS-AArch64. Macaros remains a hosted system, but its display and input implementation has developed into a fairly complete Cocoa/Metal host: dynamic display modes, resizing, fullscreen, Retina scaling, keyboard modifiers and keymaps, wheel input, clipboard sharing, menus, settings, diagnostics and control tooling. It would be great if you could look through my implementation and share your thoughts. There is considerable overlap, but the architectures differ: your backend is integrated directly into

AROSBootstrap

and

HostInterface

, while ours keeps the macOS host behind

hostlib.resource

and a versioned dylib interface. It would be useful to discuss which parts should converge upstream and which should remain Macaros-specific. There are also a few details in the merged patch that may deserve another look: •

cpu_aarch64.h

now refers to

regs.r

and

regs.pstate

, while the current AArch64

ExceptionContext

uses

x

and

cpsr

. • The change appears to remove the per-task FP/NEON storage and initialisation used to preserve vector state across task switches. •

cocoa_display.m

is added as a linker object, but I could not find the corresponding Objective-C compilation rule. • macOS normally reports Shift, Option and Command changes through

flagsChanged:

, rather than ordinary `keyDown:`/`keyUp:` events. • After resizing, pointer coordinates need converting from the scaled window coordinates back to the fixed guest framebuffer. • Running AROS on a background pthread needs careful scheduler-signal masking so timer signals cannot land on AppKit or other host threads. • The IOSurface-to-compositor step is zero-copy, but

UpdateRect

still copies from the ChunkyBM buffer into the IOSurface. The

jit_write_protect

hook is interesting too. I already have a working

MAP_JIT

path with write protection and instruction-cache invalidation for the 68k JIT, although I currently expose that through the host-library bridge. Comparing the two designs could be valuable. None of this is meant to diminish the work, it’s genuinely encouraging to have more people exploring this area. I would be very happy to compare notes, share the tests and problems we have already encountered, and hear your opinion about the Macaros approach.